URSI - High Speed Reliable Connectivity

The Universal Responsive Serial Interface (URSI) is an innovative modulation scheme that delivers the highest effective transfer rate at lowest over-sampling clock for PLL-less CDR across asynchronous sub-systems, with adjustable jitter/clock tolerance for reliable transfers.

Features

• High Speed Asynchronous Single Wire or LVDS pair Serial Communication

• Lowest 3.5x Over-sampling PLL-less Decoder per bits to reach Gbps performance

• Adjustable Bandwidth to Rate ratio from 0.6 to 0.9

• Adjustable Jitter tolerance and clock mismatch ratio from ±10% to ±20%

• Responsive Interface with 3 bits of latency

• Lower Power: Inactive during Idle periods with Break signal

• Small footprint of about 12 macro-cells per encoder and Decoder

• Full Duplex or Half-Duplex with Bus Grant/Hold Signalization

• Optional Precision Nano-Clock Synchronization in DAQ systems

Long-Distance Applications

• Low-cost reliable communications up to 1 km @ 10 Mbps and more

• Low-cost DAQ Systems

• Sensors and Control in Building Automation

• Interface to Quartz-less Sensors: RC oscillator based sensor exposed to wide temperature stresses

• Robotics and Industry

Board Level, Short Distance, Applications

• Low Cost High-Speed Chip to Chip Communication: i.e. clock of 150 MHz yields effective rate of 43 Mbps

• Low Cost (SERDES-less) FPGA 150 Mbps Inter-connection

• Automotive replacement for low-cost LIN bus: removes clock alignment period

• Alternative Technology to 1-Wire and SPI

• Single wire opto-isolation reduces footprint and cost

• MCU single-pin tracing, communication, debugging

Comparison Table

Modulation	Max Speed	Signal Bandwidth	Clock/Data Recovery	Clock Tolerance	Idle to 1st Bit	Complexity / Cost
URSI	Gbps	>0.6 x rate	>3.5x Oversample	Typical ±20%	<3 bits	Low
USB Full-speed	Mbps	0.6 x rate	4x Oversample	±0.2% + Preamble	<10 bits	Medium
Manchester	Gbps	1.0 x rate	5x Oversample, PLL	Preamble Sync	2..64 bits	Low / Medium
NRZI UART	Mbps	0.6 x rate	8..16x Oversample	±2%	<3 bits	Low
NRZI + 8b10, …	Gbps	0.6 x rate	PLL CDR	Preamble Sync	<80 bits	Higher